1. Field of the Invention
The present invention relates to a semiconductor aggregate substrate and semiconductor devices and, more particularly, to an electrostatic charge protection device for a semiconductor aggregate substrate on which a multiplicity of display active matrix circuits are integrally formed. Additionally, the present invention relates to a guard ring structure for an active matrix circuit display.
2. Description of the Related Art
FIG. 5 is a typical plan view showing an example of a conventional semiconductor device. This semiconductor device is a thin film type wherein a semiconductor thin film formed on an insulating substrate 1 is used as a device region. Display active matrix circuits 2 are integrally formed on the surface of the insulating substrate 1. A semiconductor device having such a configuration is used, for example, for liquid crystal display elements of an active matrix type. For example, an active matrix type liquid crystal display element is obtained by joining a counter substrate having counter electrodes formed thereon to the insulating substrate 1 with a predetermined gap therebetween and by filling the gap with a liquid crystal layer. The display active matrix circuits 2 have pixel electrodes 3 arranged in the form of a matrix. A switching thin film transistor 4 is connected to each of the pixel electrodes 3. A gate line 5 is connected to a gate electrode of each of the thin film transistors 4, and a signal line 6 is connected to a source electrode thereof. The plurality of gate lines 5 are connected to a vertical driving circuit 7, and the plurality of signal lines 6 are connected to a horizontal driving circuit 8. The vertical driving circuit 7 line-sequentially selects the switching thin film transistors 4 through the gate lines 5 while the horizontal driving circuit 8 supplies image signals to pixel electrodes 3 corresponding to the selected thin film transistors 4 through the signal lines 6. The vertical driving circuit 7 and the horizontal driving circuit 8 are integrated circuits consisting of thin film transistors. Leading electrodes 9 for external connection are provided at the peripheral portion of the insulating substrate 1 and are connected to the vertical driving circuit 7 and the horizontal driving circuit 8.
Guard ring patterns 10 are formed so that they surround the display active matrix circuits 2 of such a configuration. The guard ring patterns 10 are comprised of metal thin films made of aluminum or the like, and are electrically connected to grounding lines or power supply lines of the circuits 2. The guard ring patterns 10 perform the function of protecting the thin film transistors and the like constituting the display active matrix circuits 2 from electrostatic damage and the like during production.
FIG. 6 is a typical plan view of a semiconductor aggregate substrate on which a plurality of display active matrix circuits as described above are formed. The semiconductor device shown in FIG. 5 can be simultaneously produced in plurality by cutting it off from the semiconductor aggregate substrate. As illustrated, the semiconductor aggregate substrate is constituted by, for example, a rectangular large insulating substrate wafer 11 and has a plurality of segments 13 divided by vertical and horizontal division lines 12. A display active matrix circuit 2 is formed in each of the segments 13 through normal IC processing. As mentioned above, each of the display active matrix circuits 2 is surrounded by the guard ring pattern 10 to be protected from electrostatic damages. Further, a connection pattern 14 is provided to commonly connect the guard ring patterns 10 adjoining each other through division lines 12. All the guard ring patterns on the wafer 11 are commonly connected to share the same electric potential. Such a configuration makes static electricity applied to the wafer 11 during production uniform to prevent electrostatic damage from occurring to the display active matrix circuits 2 in particular segments. The connection pattern 14 is cut during the process of dividing the wafer 11.
Returning to FIG. 5, the problem to be solved by the present invention will be briefly described. The insulating substrate 1 of the semiconductor device has a circumferential end face 20 which corresponds to division lines where it is cut off from the wafer. The connection pattern 14 is left between the circumferential end face 20 and the guard ring pattern 10. The residual connection pattern 14 is not only unnecessary but also harmful to the semiconductor device after separation. Specifically, the connection pattern 14 acts as an antenna which can collect external static electricity, thereby causing electrostatic damage and electrostatic breakdown in the internal circuit. The present invention addresses this problem in the prior art, and it is an object of the present invention to provide a structure which effectively prevents electrostatic breakdown. Although not directly related to the above-described prior art, an example of a pattern for preventing electrostatic breakdown is disclosed in Japanese patent publication No. S58-116673. In that publication, a technique for commonly connecting gate lines and signal lines of display active matrix circuits before dividing a substrate is disclosed.